1. Field of the Invention
Embodiments of the present invention generally relate to fabrication of integrated circuits. More specifically, embodiments of the present invention relate to processes for depositing a layer on a substrate and then annealing the substrate.
2. Description of the Related Art
Many processes in integrated circuit fabrication require rapid high temperature processing steps for deposition of layers on semiconductor substrates, such as silicon-containing substrates, or annealing of previously deposited layers on semiconductor substrates. For example, after dopant ions, such as boron, phosphorus, or arsenic, are implanted into a semiconductor substrate, the substrate is typically annealed to repair the crystalline structure of the substrate that was disrupted during the doping process and to activate the dopants.
During the annealing steps, it is typically preferred to heat and cool substrates quickly to minimize the amount of time that a substrate is exposed to high temperatures that can cause unwanted diffusion and damage the substrate. The annealing steps may be conducted by Rapid Thermal Processing (RTP), Dynamic Surface Annealing (DSA) or heating in a batch furnace. The RTP process heats the entire thickness of the substrate and can raise substrate temperatures at rates on the order of about 200 to 400° C./second. The DSA method scans the substrate with an electromagnetic radiation and only heats and anneals a top surface of the substrate. A top layer of the substrate may be heated to a temperature between 1100° C. to about 1410° C., and cooled down to near ambient temperature in a time on the order of 1 millisecond. While the heating provided by batch furnaces typically raises substrate temperatures at a rate of about 5-15° C./minute. Accordingly, RTP and DSA are more desirable than batch furnace heating.
Uneven heating across the surface of a substrate is often experienced with RTP, DSA or other conventional substrate heating processes due to the patterns on the substrate. As today's integrated circuits generally include a plurality of devices spaced at varying densities across a surface of a substrate and having different sizes, shapes, and materials, a substrate surface can have very different thermal absorption properties across different areas of the substrate surface. For example, a first region of a substrate having a lower density of devices thereon typically will be heated faster than a second region of the substrate that has a higher density of devices thereon than the first region. Varying reflectivities across different areas of the substrate surface can also make uniform heating of the substrate surface challenging.
An absorber layer is generally used to provide uniform reflectivities and/or thermal absorption coefficient across a patterned substrate surface. A state of the art absorber layer may is amorphous carbon layer deposited by low temperature chemical vapor deposition (CVD). However, problems exist for this amorphous carbon layer. For example, if the amorphous carbon layer is formed at a low temperature, properties of the amorphous carbon layer usually change during the annealing process when the temperature is increased. Additionally, light absorb coefficient of the amorphous layer could be increased for more rapid thermal process.
Therefore, there remains a need for an improved absorber layer and method for forming the improved absorber layer to achieve a uniform heating across a surface of the substrate during an annealing process.